Internal eMMC (128 GiB)

Identity

Status — ● working

The eMMC enumerates and reads/writes reliably, but only at 25 MHz with 8-bit data; HS200 (200 MHz) is not negotiated, so it underperforms its rated speed by roughly 8x. The active development boot path is the microSD slot — the eMMC is reserved for the post-install image once Phase 2 stabilises USB and WiFi. We have not yet flipped the U-Boot boot order to prefer eMMC.

Driver

• Our tree: no local eMMC-specific driver patch. The active overlay changes the PinePhone Pro DTS and leaves eMMC on FreeBSD’s Rockchip SDHCI path; our DWMMC patches are for the sdio0 WiFi host and the sdmmc microSD controller, not this eMMC controller.
• Linux mainline: drivers/mmc/host/sdhci-of-arasan.c
• FreeBSD upstream: sys/dev/sdhci/sdhci_fdt_rockchip.c

RK3399 has separate storage hosts here: sdio0 and sdmmc are DesignWare MMC blocks, while eMMC is the sdhci node at 0xfe330000. eMMC needs bus-width = <8>, non-removable, and the mmc-hs200-1_8v capability bit before HS200 can be tried. We have only enabled the basic 8-bit/25 MHz path; the HS200 negotiation requires 1.8 V signaling support that is currently untested in the FreeBSD driver.

Open work

• Enable HS200 mode for 8x throughput improvement (DTS mmc-hs200-1_8v, verify sdhci_rockchip 1.8 V signal switch — see HARDWARE.md storage TODOs).
• Test eMMC as boot target after SPI NOR is unblocked so U-Boot can chainload from it.
• Verify mmcsd0 device naming and partition layout match the Honeyguide image expectations before any installer work.

Related

• Boot from SD with Honeyguide — current boot path uses the separate microSD DWMMC controller.
• microSD slot — removable media on sdmmc / DWMMC.
• SPI NOR (GD25LQ128) — holds the bootloader that ultimately hands off to whichever block device wins the boot order.
• Hardware reference — full chip manifest.